1. Field of the Invention
This invention relates to an interconnect structure and method of interconnecting an infrared detector to external circuitry and, more specifically, to a thin film flexible electrical lead structure for use as the detector interconnect in a detector system.
2. Brief Description of the Prior Art
An interconnect is a multilayer thin film structure fabricated by conventional semiconductor processing techniques. The interconnect structure includes alternating layers of electrically insulating and conductive materials. Vias in the insulating material provide electrical connections between the conductor layers and bond pad terminations on semiconductor devices. The number of conductor layers depends on the signal routing, grounding and shielding requirements for the interconnect.
In the case of an interconnect for an infrared detector, for example, the number of conductors in the interconnect can vary from one to several hundred, depending upon the detector. Some detectors have only a few elements, each element being connected to an input and output lead to transmit the detector analog signal. Other detectors have many thousands of elements and have a multiplexing capability integrated with the detector. The latter is often referred to as a focal plane array (FPA) FPAs require not only analog signal leads, but also leads for bias and timing of the multiplexer. In all cases, the interconnect is a vital link in the IR sensor video chain. It is implicit that the interconnect conductors have resistance, capacitance and inductance and it is imperative that these parameters not exceed the limits required for high data transmission rates and low level signals.
Electrical criteria are not the only factors influencing interconnect design. Detectors, and especially infrared detectors of the type primarily referred to herein operate at cryogenic temperatures, usually about 77.degree. Kelvin (-320.degree. Fahrenheit). Accordingly, one end of the interconnect will generally terminate at a region which is at about 77.degree. Kelvin while the other end thereof will be at ambient temperature or the like in the vicinity of 300.degree. Kelvin. The interconnect thus conducts heat to the detector and increases the cooling energy required to maintain the detector at 77.degree. Kelvin. A thermally efficient system therefore requires that the heat leak through the interconnect be minimized. This implies small cross-sectional area conductors.
Cooldown time is another thermal issue. Some sensors require that the detector be cooled from room temperature to 77.degree. Kelvin in seconds. This is achieved by minimizing the mass to be cooled, i.e., minimizing the thermal inertia. Since the interconnect also requires cooling, it contributes to the overall thermal inertia. An interconnect with negligible or minimal mass is therefore desired.
Vacuum compatibility is yet another criterion. Typically, the IR detector and the interconnect are contained in a vacuum cell that provides insulation from the outside world. To meet performance goals, pressure in the cell typically cannot exceed one ten thousandth (10.sup.-4) of an atmosphere. Volatile and hygroscopic materials, such as organics and non-metallics, can contaminate the vacuum cell by the process of outgassing. Thus, the interconnect should be constructed of low outgassing materials.
In accordance with one type of prior art, each detector element is individually connected to external circuitry using soldered wires or compression bonding. This is feasible when only a few detectors are present and is time consuming, cumbersome and thermally inefficient for large detector arrays.
U.S Pat. No. 4,059,764 describes a means for metallizing leads on a non-conductive carrier such as glass. This method was further refined and became the foundation for Common Module detectors as set forth in U.S. Pat. No. 3,851,173. It is a thermally efficient method for providing several hundred electrical leads on a cylindrical surface. The drawbacks to this approach are manufacturing complexity and thermal mass. Achieving the fine geometry leads needed for multi-element arrays requires sophisticated and specialized process equipment. Also, the mass of a glass carrier structure is prohibitively high for fast cooldown sensors.
A variation on this approach uses individual wires embedded on the circumference of a cylindrical glass carrier. This technique is simpler than the evaporated metal approach, but does not achieve the lead density required for complex detector arrays. Also, it does not solve the excessive thermal mass problem.
Flexible interconnect cables have been widely used in IR Dewars. For example, U.S. Pat. No. 4,645,931 discusses two techniques for making a cable that bundles together multiple electrical leads on polymeric film. The first technique imbeds individual wires into the film. The second technique bonds a metal foil to the film, then defines the lead pattern using photolithography.
While the concept of a flexible interconnect is sound, several problems are posed by the manufacturing techniques described above. First, neither technique achieves the thermal efficiency goals required for modern detectors because the lead geometries cannot be made sufficiently small to restrict the flow of heat through the interconnect electrical conductors. Second, the various layers which make up the cable must be bonded together with epoxy, thereby promoting a large surface area for outgassing. Third, each layer of film is relatively thick, on the order of 50 to 100 microns. Since many film materials are hygroscopic, a significant volume of water absorbing material can be present, further contributing to outgassing problems. An improvement on this method uses an electroplate process to define the interconnect. However, the small cross-section geometries required for modern applications cannot be obtained.
A still further prior art method of providing flexible interconnects is set forth in U.S. Pat. No. 4,709,468 wherein a polymer/conductor multilevel film is cast on a substrate, a template having holes adapted to receive an integrated circuit in alignment with corresponding locations of the template is provided and maintained, the integrated circuit is affixed to the film and the film and integrated circuit are then removed from the substrate.